Scientific Library of Tomsk State University

   E-catalog        

Normal view MARC view

Design for Manufacturability electronic resource From 1D to 4D for 90–22 nm Technology Nodes / by Artur Balasinski.

By: Balasinski, Artur [author.]Contributor(s): SpringerLink (Online service)Material type: TextTextPublication details: New York, NY : Springer New York : Imprint: Springer, 2014Description: VIII, 278 p. 214 illus., 45 illus. in color. online resourceContent type: text Media type: computer Carrier type: online resourceISBN: 9781461417613Subject(s): engineering | System safety | electronics | Systems engineering | Engineering | Circuits and Systems | Electronics and Microelectronics, Instrumentation | Quality Control, Reliability, Safety and RiskDDC classification: 621.3815 LOC classification: TK7888.4Online resources: Click here to access online
Contents:
Preface -- Classic DfM: from 2D to 3D -- DfM at 28 nm and Beyond -- New DfM Domain: Stress Effects -- Conclusions and Future Work.
In: Springer eBooksSummary: This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes.  It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package. ·         Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm  technology nodes; ·         Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package;  ·         Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources; ·         Helps readers to translate reliability methodology into real design flows.
Tags from this library: No tags from this library for this title. Log in to add tags.
No physical items for this record

Preface -- Classic DfM: from 2D to 3D -- DfM at 28 nm and Beyond -- New DfM Domain: Stress Effects -- Conclusions and Future Work.

This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes.  It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package. ·         Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm  technology nodes; ·         Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package;  ·         Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources; ·         Helps readers to translate reliability methodology into real design flows.

There are no comments on this title.

to post a comment.
Share